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Recent content by jecyhale

  1. jecyhale

    Is the output waveform of a crystal oscillator always a sinewave?

    Re: Cyrstal oscillator It should be a sine wave. And we should limit the amplitude of it because it will be damaged with too large amplitude. Added after 2 minutes: You will get a square wave, but when you detect the signal of the terminals of Crystal, it should be a sine wave. Added...
  2. jecyhale

    Where did this CMOS device IV curve come from?

    cmos iv curve A diode connection MOS. Id vs Vgs and Vgs=Vds
  3. jecyhale

    Calculation of the oscillator bias point

    The Id and Vgs of this MOS if the W/L is given.
  4. jecyhale

    what`s the layer used for in technology file of asitic?

    Metal 0 is the first metal layer.
  5. jecyhale

    How to realize a freq. triple circuit ?

    You can use a filter to get the 3rd hormonic, then use comparator as the follow. But the filter should be good enoght. Or, you can use mix to double it twice. But PLL is the best choice.
  6. jecyhale

    how to deal with GND to GND ESD?

    Re: GND to GND ESD Thanks for your reply, but do you any other methods?
  7. jecyhale

    how to deal with GND to GND ESD?

    GND to GND ESD Hi, all Who knows how to deal with GND to GND ESD? Thanks.
  8. jecyhale

    First Fractional-N phase noise table

    It is good or bad detemined by the system. So you should use it in some system, then to find whether its performance is ok. Besides, phase noise is not all which should be cared.
  9. jecyhale

    Can I use different kinds of MOSFETs in one circuit (.18 CMOS process)?

    Re: .18 cmos question Of course can. 3.3V and 1.8V means the power supply of the mosfet.
  10. jecyhale

    Can I power 10V to four supercapacitors (20F 2.5V) in series?

    Re: Capacitor - Series I think it is dangerous.
  11. jecyhale

    Foundry requirement: metal density requirement when tape-out

    Re: Foundry requirement: metal density requirement when tape Metal density is warning, not an error. Usually it is not fatal if you didn't meet the requirement. But if there are free areas, you'd better add more. When you are doing the top level intergration, you will add many ESD, PADs and...
  12. jecyhale

    Understanding Mixer's Conversion loss

    passive mixer conversion loss I think conversion loss is just the conversion gain. And the relationship between conversion gain and NF is same with that in LNA design.
  13. jecyhale

    Need a precise frequency difference culculation CMOScircuit

    Re: Need a precise frequency difference culculation CMOScirc Mixer can be used. Just use F1 and F2 as the two input of Mixer, and the output is the result you need.
  14. jecyhale

    Help me understand a peak detector diagram

    Re: peak detector ,help Can you tell us the frequency? I have designed one which works with the frequency lower than 10MHz. Added after 1 minutes: It seems that A and B are inverters, isn't it? This PD is too complex, why not use a simple one?
  15. jecyhale

    What is the output voltage??

    It should be an amplifier with very high linearity.
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