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Recent content by jambhumalamal

  1. J

    FPGA and VHDL/Verilog for Begineers

    Thanks man, appreciate it.. Tat would be a big help...
  2. J

    FPGA and VHDL/Verilog for Begineers

    Hi, Thanks for your quick response. I actually had a a team project of establishing synchronous and asynchronous communication between 2 FPGA using CRC error checking. So, using the provided flowwchart of the process me and my teammate developed VHDL code for it. (it was then i learnt VHDL for...
  3. J

    FPGA and VHDL/Verilog for Begineers

    Can u provide me with some links which would demonstrate step by step procedure to work with FPGA ? I am extremly new to this background and do not know where to start. I have a Xilinx Spartan 3E board to experiment on..
  4. J

    FPGA and VHDL/Verilog for Begineers

    Hello, I am a MS student in Electrical Engineering. I just had the opportunity to explore FPGA in one of my classes. I also learned some VHDL for using the XIlinx Spartan 3E FPGA. I want to learn more about it by experimenting and doing more projects and stuff. Can anybody help me with...
  5. J

    Help Needed for MS Research thesis (FPGA)

    Hi, U said that you have almost 2 years of experience with FPGA. I am a new learner of FPGA's and Verilog / VHDL language used. I want to be more familiar with FPGA's by practicing FPGA based projects. Can you guide me towards it ? Thanks for your help...
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