Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
in the above circuit there are NMOS and PMOS Current mirror circuits. PMOS SW and NMOS SW blocks represent the mos switches. the W/L ratio for Current mirror circuit is 10/0.18um. the W/L ratio for switches are 2.3/0.18.
If the w/l ratio is increased then the output current provided by the...
hi, i am having a pll operating at the range 1-500 Mhz. I have designed pmos and nmos switches but the output of the switches is wrong. can anyone help me about which parameter should i change in the pmos and nmos switches so that i get right output. is it the w/l ratio? or anyother parameter
this is a phase frequency detector. can i find the dead zone of this circuit without charge pump. if yes then guide me how to find the dead zone of this circuit.
the cascode current mirror circuit designed by me in simelectronics gives me less current as compared to basic current mirror circuit. for basic current mirror w/l ratio = 2/0.18um i get current of nearly 97.5uA. my reference current is 100uA. For cascode current mirror i get current of 98uA at...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.