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Recent content by jacocobi

  1. J

    Can we assign the integer value on input pins of Spartan-3 ?

    integer value on fpga??? you can use the conv function of the std_logic_arith library to convert the data type, it is quite simple and would be indicated by every VHDL book.
  2. J

    Improving the FPGA design skills

    the verilog coding style provided by motorola or Actel could give you some help..
  3. J

    I need Modelsim 6.2b user guide

    Modelsim 6.2b user Hi, you can find all the help materials in the help of ModelSim 6.2b, the user guide is also included, just check it.
  4. J

    How to convert VHDL code to Verilog?

    vhdl sync code detection the software I can strongly recommend is the X-HDL3, that might help you to save much time.
  5. J

    FPGA programming via LABVIEW

    I have also heard of that, but never tried, would that also somewhat similar to FPGA programming via Simulink.....
  6. J

    how to produce vhdl code using simulink?

    simulink to vhdl Ahh...ach so!
  7. J

    How to set the core_gen signal ?

    core_gen if u are talking with reference to Memory and your design interface,then use inverted clock for Memory when your design is working at clock. That is quite reasonable......
  8. J

    what's the different between Logic cell and CLB?

    1 x CLB = 2 or 4 x Slices 1 x Slice = 2 x logic cells 1 x logic cell = 1 x 4 input LUT + 1 x MUX + 1 x REG That is it, quite simple...
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