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ok sir i understand that i need jtag cable ok with that
when we run xilinx logicore library it gives us output model sim as waveform where should i put inputs from where should verify output as i am new to this field i am unable to understand how to verify it
how to verify input and output of FFT ip from logicore Xilinx library and why it is not synthesizable and how to use chipscope analyzer and is there any need of digilink cable for it
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