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Recent content by Ipanema

  1. I

    Common Centroid & Interdigitization

    common-centroid Guys, For high speed (GHz) differential amplifier, should I use common centroid or interdigitized? Both seems to add additional parasitics to the high speed line. What's your experience in this? Regards.
  2. I

    How to avoid unwanted comparator switching of flash ADC comparator?

    high speed adc comparator Thanks for the assurance. Question : 1) Do you use regulator for your comparator? 2) What is your 1LSB voltage? Thanks.
  3. I

    Current Mirror biasing

    Can you point me to some bandgap reference current generator for biasing? I only have bandgap voltage generator (Brokaw), but using I/V converter to generate bandgap current this way will produce error because of resistor tolerance. Thanks.
  4. I

    Current Mirror biasing

    Guys, Just want to do a quick survey on this : Which one of the biasing that you use most often? and in which circuit? Thanks,
  5. I

    How to avoid unwanted comparator switching of flash ADC comparator?

    comparator flash adc Can you explain what is postive feedback load ? FYI, my system main signal path switches at 1.25Gbps, while my comparator only need to work at maximum 1KHz. I'm trying to reduce the bandwith of my comparator further down as currently it has a bandwith of 100KHz. Will this...
  6. I

    Current Mirror biasing

    Thanks for your comment. Do you think that it is neccesary to bias all opamp with Bangap current? What do you think of PTAT biasing? It seems to be compensating for input gm variation across temperature. Biasing 1, 2 and 3 are more commonly use for biasing. Which one do you think is better...
  7. I

    How to avoid unwanted comparator switching of flash ADC comparator?

    adc with comparator How much PSRR do I need at the noise frequency? How do I determine the noise frequency because the noise from transient simulation are just random ripple? Thanks.
  8. I

    Minimum offset voltage with 0.18um CMOS process

    Does the second stage contribute to the input offset voltage? From MC simulation, the second stage does not contribute to input offset voltage. May I know why is it so? Thanks.
  9. I

    How to avoid unwanted comparator switching of flash ADC comparator?

    adc comparator design The comparator that I'm using is the typical two stage opamp configuration with pmos as input. Why do you think that supply noise won't cause unwanted switching error? Thanks.
  10. I

    Minimum offset voltage with 0.18um CMOS process

    Guys, May I know what is the minimum achievable input offset voltage for comparator in 0.18um CMOS process? I can only achieve +/-6mV with a PMOS input differential pair simulated over process & mismatch in Monte Carlo analysis. Does the second stage of comparator play a role in...
  11. I

    Current Mirror biasing

    Guys, Pls help to comment on these 5 types of current mirror reference generator biasing circuit shown in the attachment. Which one is most suitable for biasing differential amplifier tail? Figure of merit e.g. Constant gain across process and temperature variation, low input offset...
  12. I

    How to avoid unwanted comparator switching of flash ADC comparator?

    Hi, I'm designing a 6-bits flash ADC. The comparator that I'm using does not have "hysteresis" feature and the comparator supply are coming directly from VDD without a voltage regulator. I'm worry that noise coming from power supply will cause unwanted switching of the comparators. Should I...
  13. I

    how to improve the parr of a bandgap

    Can I use a voltage regulator before a bandgap to further inprove PSRR? In this case, it create a loops between bandgap and voltage regulator, where bandgap supply reference voltage to regulator. Anyone have experience in this? Regards.
  14. I

    bandgap floor planning

    Anyone? Pls help. With these layout for 20:1 ratio, what would be the matching percentage from your experience? Regards. Added after 1 minutes: Anyone? Pls help. With these layout for 20:1 ratio, what would be the matching percentage from your experience? Regards.
  15. I

    bandgap floor planning

    Propose layout :
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