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Recent content by ilovephysics

  1. I

    ModelSim not showing all the signals

    I have been using ModelSim for a while with no issue. Today,however, I ran into a annoying and stupid problem that I cannot overcome for the life of me. The problem is that after I changed my test bench and added some new signals in the top level, ModelSim is not showing them (I cannot find...
  2. I

    Resistor termination for FPGA to SPI

    Hi, I am working on a project that interfaces a Virtex 5 with a high speed DAC (AD9781). I will be controlling this DAC through SPI (serial port interface). At first I naively thought that I could just straight up connect my FPGA pins to the SPI pins on the DAC. Then after some research, I...
  3. I

    [SOLVED] BRAM's output to I/O pins

    Thanks a lot!
  4. I

    [SOLVED] BRAM's output to I/O pins

    I instantiated a block RAM with 14-bit width on my Virtex 5 (XC5VLX50) and I want to send the 14 bit data at every address to a 14 bit DAC. Therefore I have to send every individual bit of the 14-bit word to a separate I/O pin on my FPGA. Is there a way to make sure that all the routes from...
  5. I

    Ribbon cable from FPGA to DAC

    Thanks! Just to be clear, are you saying that I can use a cable like this guy here to connect to the eval board's port? https://multimedia.3m.com/mws/mediawebserver?mwsId=66666UuZjcFSLXTtnxfc5xT_EVuQEcuZgVs6EVs6E666666-- In this datasheet, it says the impedance for unbalanced configuration is...
  6. I

    Ribbon cable from FPGA to DAC

    I have to send 14 bits of parallel data to a 14 bit DAC evaluation board AD9755,https://www.analog.com/static/imported-files/data_sheets/AD9755.pdf I need to use a ribbon cable to transfer the data from my FPGA daughterboard to the DAC eval board's IDC connectors. I have assumed that the...
  7. I

    [SOLVED] DAC setup and hold time

    Thanks! It helped!
  8. I

    [SOLVED] DAC setup and hold time

    I am looking at the timing parameters for a DAC, AD9755. https://www.analog.com/static/imported-files/data_sheets/AD9755.pdf It has the following specifications: input setup time: -1 ns (Min) -1.5 ns (Typ) input hold time: 2.5 ns (Min) 1.7 ns (Typ)...
  9. I

    Question about DAC input current

    Thanks a lot!
  10. I

    Question about DAC input current

    I have a question about the current limit for the digital inputs to a DAC. The DAC that I am using is AD9755 https://www.analog.com/static/imported-files/data_sheets/AD9755.pdf On the datasheet, under Digital Specifications then Parameter, it says that the range for the input current is from...
  11. I

    Confusion about DAC's sampling rate

    I am not using the DAC to control the pulse width. My FPGA can already do that. I just want the DAC to do the smooth rising and falling edge since FPGA can only output sharp logic levels.
  12. I

    Confusion about DAC's sampling rate

    I am an extreme noob when it comes to DAC. I am looking at AD9780 right now. I want to use a DAC to produce the smooth rising edge and falling edge of a square pulse. I am controlling the width of the square pulse on the order of nano seconds so preferably edge time also should be on the order...
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