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Hi,
I am working on Hexagon DSP and I want to know what are the exceptions in DSP like we have DATA ABORT, PRE FETCH ABORT, etc in ARM Cortex. I want to know what are Hexagon counterparts for DATA ABORT, Prefetch abort etc. Thanks
Hi, I am facing problem in binding the bit blasted signal of the netlist to the corresponding bussed signal in the vera interface. Can anyone suggest how to bind such bit blasted signals. I am not looking for making any kind of wrapper.
interface vera_if {
input [31:0] data INPUT_PORT...
I am going to do a power am[lifier testing. The RF output power of the amplifier is 30dBm and my spectrum analyzer can have maximum input of 10dBm. I have 10DB attenuator. Can I go ahead with the testing?? And is 10DB equal to 30 dBm??
Thanx in advance
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