Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
photo diode layout
I want to design the layout for the left sided figure. I know how i can do it for right sided.. but how should i make left side layout.. cause the problem arises when the p type needed to connect to another than ground. i am using cadence with 0.35 technology. thankx for yr...
PLL application
I understand the pll and the use of it but i don't get one thing. In pll what we did is we used vco to generate about 2ghz frequency and then useing phase detector we compared with external clock which is running in phase. so my point is if we allready have crystal oscillator...
I am trying to amplify current through current mirror. The current waveform looks good when i don't use switch. But when i use switch (pmos transistor) to control the passing current, i see current spikes at rising and falling edge of switch clock.
does that spike really maters? if matters...
I would like to know what are the steps to consider to implement differential amplifier.
Lets say... i want to take the difference out of two signal... the signals are not periodic and the amplitide is between 0.5 to 2.5 volts
how should i start designing the amplifier and what kind simulation...
funcky question
hey i wanted to know, what is the reason behind two battery supply always connected in reverse way...(it's like if u see yr remote then the direction of both battery is different direction... what is the reason why they always does it like this way...
---> is it beacuse the...
the reason behind generating negative voltage....
I am designing a flash a/d converters and for that i need static reference of voltage so i desided to use pmos transistor to behave as a resistor.... i tried supplying few millivolts to gate voltages but didn't work ( the refrence voltages for...
hi just wondering... how can i generate negative voltage in CMOS... lets say my vdd is 3.3 v and i need to generate a negative voltage lets say -2.5 volt. how would i do it? ?
Hi
I am living in canada.. I am a freshly new graduate who is looking for a job in IC designer... could any one suggest which companies are hirring at this moment or willing to be. and what are my chances to get a job in usa... (as being a citizen of canada i don't have to go through the long...
HI,
I need a suggestion for making integrator and comparator. I know how they look like as an op amp view. can u provide me some deatil info about inner schemtics... how does it look like and how it behave. I try to find the schematics for both integrator and comparator... but not much luck...
hey guys off from yr question, i need to design 8 bit a/d converter in cmos, for that i need to design 1 bit d/a. give me some guideline to start my work..
for a/d basic blocks are integrator, comparator and d/a. can u give me some links or guideline which deals with mainly on design cause i...
I am designing current mirror amplification for photodetector circuit. So basically reverse photodiode in nano amp. can i amplify that current?
the size of current matters when we considering current mirror amplification?
will the transistor will be cut off?
(i am doing it with MOSFET using...
hey just a little bit curious about the gps thingy... once we paid for the reciever (or gps modem) dow we have to pay any monthly fee or some kind of payment to activate ... how does it work ?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.