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i'm a way down beginner at vhdl programming and just can't get what's wrong with this code! The error msg is "EOF syntax error" but dunno. How stressful.
I would really really REALLY appreciate it if someone can give me a hand with this.
please help =]
library ieee;
use...
Hello! i'm new to digital design, especially VHDL. I've designed a 16-bit CLA code and a testbench for it but i'm having difficulty with the testbench part.
It won't even compile and i can't find where i've gone wrong. It would be a great big help if you could lend me a hand. So, here's the...
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