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Recent content by Hunter_BJUT

  1. Hunter_BJUT

    Jitter problem in switching converter

    Jitter problem many stuff make jitter in A/D clock generation unit contribute the apture error, use dll to alleviate.
  2. Hunter_BJUT

    What does "Zero-IF" mean ?

    Zero-IF ? one defect is dc offset.
  3. Hunter_BJUT

    Can you set array as variables in Spectre?

    Variables in Spectre not hear of that yet
  4. Hunter_BJUT

    How to test dnl of adc under cadence ?

    measure dnl cadence i had used that model,but difficulty to implement due to long simulation time. you can also change verilog-A code into 10-bit
  5. Hunter_BJUT

    Help needed in testing of ADC

    danymic: FFT static:code density histogram tool: matlab or labView
  6. Hunter_BJUT

    How to decide the power bus width?

    power bus width 1mA per um, leave sufficient margin
  7. Hunter_BJUT

    Why Vdd is also the AC ground when doing small signal equivalent circuit analysis?

    a simple question for ac, vdd is small signal ground
  8. Hunter_BJUT

    input common mode range

    dc sweep of opamp, find the linear range.
  9. Hunter_BJUT

    What is the constant factor and how to calculate frequency in .PZ analysis results?

    .PZ Analysis Results 1) form system state equations, using matrix. 2) contant for the transfer function H(s)=K*(1+s/z1).../(1+s/p1)(1+s/p2).... constant K is that.

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