Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
dear all,
i want routing a 5G clk using second metal, it length is about 250um. i want using 0.2um width, is it too narrow? does the high speed clk use the metal the wider the better?
thanks!
hi, erikl,
your parameter is so large that i can't believe it. if two resistor's distance is 200um, and the w*l is 10um*10um, the mismatch will be 20%. I know the diference of square resistance for all process corner will not exceed 15%.
thank you ,
i know the layout rule for resistor match. i just want know how much mismatch will be caused, when the distance between resistors is about 200um.
hi, dick_freebird, thanks for your reply. can you describe the problem in detail, i can't understanding the problem.
and in the adc, calibration is used, so i think match is not the problem.
Hi, all,
I encounter a problem on my 14bit ADC, when i test it, the code at 2^10-1, 2^11-1 and 2^12-1,2^12-2 will be missing, and this will degrade the INL and DNL to 3LSB. but when i test the dynamic performence, the THD and SINAD is good.
so i want kwon what can make the word missing...
hi, all,
i design a ADC, and now it is tested, but i have no any software to get SNR and THD+N THD..., but some digital data is sampled from a logic analysis device, and a piece of MATLAB procedure is need to get SNR, THD+N, THD and the FFT figure, but i can't compile the procedue.
can you...
hi, all
i designed a ring oscillator use 3 defferential input and defferential output one stage amplifier, and the post simulation shows the frequency does not exceed ± 8%.
but when it come from fourndry, the test result show that the frequecy is different from the post simulation...
hi, all,
with A 130NM cmos PROCESS, does the 14bit(or above) SAR ADC can be realized without any calibration?
or does the 14bit(or above) SAR ADC can be realized without any calibration?
but infact, in many process, the filler will be add in, it may also go through the device.
if i don't use first metal, but use metal 2ed above, is it better
hi all,
1. if metal wire go through the matched MOSFET, how much will influence the accuracy?
2. if the metal wire is symetric on the matched MOSFET, HOW much will influence the accuracy?
3. how about the poly resistor.
thanks.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
