Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by hotgu

  1. H

    UMC 28nm process poly density checking window

    why does TSMC have 50ux50u of high poly density checking window then? I think it improves the yield.
  2. H

    UMC 28nm process poly density checking window

    Thanks for the explaination. Unfortunately, we didn't find other rules for high poly density checking in this process than this rule. Do you mean that we can't rely on this rule for doing the high poly density checking?
  3. H

    UMC 28nm process poly density checking window

    In their design manual, it says so. I pretty much doubt the PDK they provide is not complete.
  4. H

    UMC 28nm process poly density checking window

    Is there anyone who's used UMC 28nm for analog circuit before? In this process, the POLY high density checking window is 1mmX1mm stepping 500um, is that possible? It's a big question mark.

Part and Inventory Search

Back
Top