Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by harerama

  1. H

    VHDL error expecting STRING_LITERAL or a tick-double-quoted string literal

    HI all, I new to the VHDL please help me to sort out this error. near ";": syntax error, unexpected ';', expecting STRING_LITERAL or a tick-double-quoted string literal
  2. H

    VHDL STRING_LITERAL or a tick-double-quoted string literal ERROR

    HI all, I new to the VHDL please help me to sort out this error. near ";": syntax error, unexpected ';', expecting STRING_LITERAL or a tick-double-quoted string literal
  3. H

    Write response of axi

    Hi, I go through spec may be available all the details or arm web site for information.
  4. H

    is there any methdology about verification amba bus?

    Hi. we can verify using system verilog, If u need methodlogy u have to go ovm or uvm. For basic examples for system verilog check in http://testbench.in/TB_00_INDEX.html.
  5. H

    Xilinx Zynq-7000 All Programmable SoCs

    Thanks.. For programming to zynq which one is better Vivado Design Suite or any other??
  6. H

    Xilinx Zynq-7000 All Programmable SoCs

    Thanks shahulakthar... In industry started using Xilinx Zynq-7000 and where is the applications?
  7. H

    Xilinx Zynq-7000 All Programmable SoCs

    HI all, I need materials to learn Xilinx Zynq-7000 All Programmable SoCs.
  8. H

    Run systemverilog files in perl

    Hi all..I need procedure to run (different testcases) many different system verilog files in PERL.
  9. H

    How to create Driver,sequencer,monitor etc in system verilog.

    HI all, I need examples in system verilog to create monitor,driver,sequencer etc ?
  10. H

    BE projects for students ....

    open core contains lot of VLSI domain projects with details to check visit https://opencores.org/projects
  11. H

    Help in verilog HDL...

    Look at https://opencores.org/projects
  12. H

    undefined reference" problem while compiling GHDL with GCC 4.6.3

    HI All, I am currently trying to Build GHDL-0.29 on top of a newer GCC 4.6.3(fedora 16), ../gcc-4.6.3/configure --enable-languages=vhdl --disable-bootstrap configured successfully. and applied Kevin Steffensen patch (**broken link removed**) and then 'make CFLAGS="-O"' Got below error...
  13. H

    New version of gcc crashes when installing ghdl

    > If it does, then why did you try to install an older version (4.3.4)? Actually ghdl source code contains gcc 4.3.4 and ghdl-0.29 so in i done gcc 4.3.4 directory make and make insrall.
  14. H

    New version of gcc crashes when installing ghdl

    HI All, 1. I working on GHDL, an open source VHDL simulator project,it consists of ghdl-0.29 and gcc 4.3.4. For my project purpose followed below steps to install on fedora 16. yumdownloader --source ghdl rpm -i ghdl-0.29-2.143svn.4.fc16.src.rpm rpmbuild -ba ~/rpmbuild/SPECS/ghdl.spec it...

Part and Inventory Search

Back
Top