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Recent content by hans_r

  1. H

    Encounter: Clock Mesh specification - analysis specification

    Hi, I'm doing a design using a clock mesh, and I would like to do spice extraction for back annotation in Encounter. In my clock mesh spec file I have the library defined like this: Analysis MultiPartSpice true MultiPartSpicePartitionLevel 4 End...
  2. H

    Encounter Library Characterizer Feedthrough Problem

    Hi ioztelcan, I fixed the problem! You should use a bool file to help ELC with the cell recognition. To make a bool-file, check the ELC user guide appendix D. After preparing the database, you should run the db_gsim command with the bool-file, in stead of using the db_gate command, like this...
  3. H

    Encounter Library Characterizer Feedthrough Problem

    Hello ioztelcan, did you solve the problem? If yes, could you please explain a little, since I'm having the same problem... Kind regards!
  4. H

    voltage interface 3.3V -> 1.8V on chip

    Thanks for the reply. I was worried this would be a point of discussion in the defense of my design. I am glad you think this way. Kind regards...
  5. H

    voltage interface 3.3V -> 1.8V on chip

    Hi, I'm using the UMC180nm technology to design an image sensor: the thick oxide 3.3V transistors are used for increased swing when sensing the light. I want the digital parts of my circuit to work on 1.8V (reduces area!). I'm using a thick oxide inverter attached to 1.8V in stead of 3.3V. In...
  6. H

    Design of a comparator without undetermined output

    Even if I register it to the clock, this does not solve my problem?
  7. H

    Design of a comparator without undetermined output

    I'm making a ramp ADC: the comparator should compare the input voltage with a ramp. The output of the comparator is used as memory_enable signal to store the ramp-value in a memory. For now, I'm just using an open-loop amplifier as a comparator. If the voltage-difference is to small, the output...
  8. H

    Design of a comparator without undetermined output

    Hi, i'm designing a comparator for a 12-bit AD-converter. I'm having some problems concerning the driving of the digital blocks after the comparator, and have these thoughts about it: The comparator should always output a 0/1, otherwise the digital block will go in an undetermined state...
  9. H

    [SOLVED] comparator gain monte carlo analysis

    Re: open loop amplifier gain monte carlo analysis This solves the problem!
  10. H

    [SOLVED] comparator gain monte carlo analysis

    open loop amplifier gain monte carlo analysis Hi, I'm using a differential amplifier as a comparator to compare a ramp with an input voltage (ramp ADC principle). The comparator is just an amplifier with enough gain to amplify to Vdd/Gnd. I want to do Monte Carlo analysis to see how the gain...
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