Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I am facing a problem in my LCD interface code..
Is there any other reason for not getting data on 2nd line of LCD!!!???
Hoping for the help and guidance....
here is my lcd_mod module
module lcd_mod
(
input CLK_50MHZ,
output LCD_E,
output LCD_RS,
output LCD_RW,
output...
can anyone please help. i am trying to make a verilog code for 128hex data to show on LCD of spartan 3E.
but its just showing first line means 64 bits
its a part of my project i am working on it from last 8 hours but... please help
modules are attached
- - - Updated - - -
sorry 128 bit...
can anyone please help. i am trying to make a verilog code for 128bit data to show on LCD of spartan 3E.
but its just showing first line means 64 bits
its a part of my project i am working on it from last 8 hours but... please help
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
