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Recent content by goodaway

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    matlab code for software radio reciever

    Re: DIGITAL RECEIVER 64 channel DDCs can implemented in a single FPGA such as VirtexII Pro30
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    Cost-effective multi-channel DDCs solution

    -------------------------------------------------------------------------------- innovation: 32-Channel DDCs/64-Channel DDCs The core is based on a novel channelisation architecture, which provides the flexibility traditionally associated with DDC cores and ASIC devices, but with...
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    implementation if OFDM with FPGA

    altera FFT/IFFT IP core has some bugs,It Troubled me for a long time
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    Innovation multi-channel DDCs IP core

    innovation: 32-Channel DDCs/64-Channel DDCs The core is based on a novel channelisation architecture, which provides the flexibility traditionally associated with DDC cores and ASIC devices, but with significantly greater silicon efficiency,It Can be integrated into a single three million...
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