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Power map
I've tried to generate power map using SoC Encounter.
But it seems to be impossible to generate a detailed power map inside a block,
though VoltageStorm is able to do power analysis such as IR drop analysis within a block using tools like XTC & Thunder.
The Encounter power tool sees...
It's been a while. Anyway, thank you for your help.
I'm following the pr_gds flow.
But, there're errors I can't figure out.
Here is my libgen.cmd file.
input_type pr_gds
lef_file_list { csm13_6lm_tech.lef InstrMem.lef }
# put each gds file in a separate line to bypass gds_file_list line limit...
Now I have a working one which shows IR drop.
But in some cases, the same error happens.
I looked into log file, and I found something interesting.
During voltage storm analysis, "checking the connectivity of the circuit" shows up,
which is followed by
Connect_size[0] = 1
Connect_size[1] = 248...
Hi all,
I'm doing voltage storm IR drop analysis embedded in SoC Encounter tool.
When I used Encounter's power tool (power -> early analysis -> simulation-based),
I can see the IR drop by adjusting threshold.
But when I use voltage storm, everything falls into a single bin, no IR drop at all...
power analysis in soc encounter
Hi all,
I'm doing power analysis for u-processor with Encounter.
There are some modules such as an instruction memory customly designed.
Encounter sees this as a single cell, so I can not see the power map and IR drop inside this module.
Do you have any...
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