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Recent content by godcadence

  1. G

    ring oscillator frequency variation

    If you adopt PVT compensation circuits, then the frequency will be controlled in a acceptable range.
  2. G

    Emitter area multiplying factor in Hspice simulation

    spice,manual,bjt,area The AREA parameter is an area factor that works on the model dc parameters. If you got the foundry's model and set the AREA to 2, then all the dc parameters in the model will be set to the AREA*2's transistor. You may do a simple simulation to verify it.
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    How to deal with the high input voltage of LDO

    +hot nwell +voltage +tsmc The Vgs may be 5v during startup, will the transistor break down?
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    How to deal with the high input voltage of LDO

    site:www.edaboard.com 3.3v 5v breakdown 5v to 3.3v/1.8V LDO, design with 5v tolerance 0.18um process. Due to the 5V input voltage, the voltage between the drain and gate of the power pmos transistor may exceed 5v, it may cause the transistor to break down, how should I deal with this...
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