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Be interested to know the answer...if there is one...
It would have to rely on combo delay, which would be very PVT sensitive would it not? I'm sure you could come up with a pulse-rejection cct, but how accurate to 5 ns it would be I don't know.
Unless it's a trick question where they want...
Re: tcl or perl
To be honest, once you learn one you learn them all for the most part.
The point is that they are dynamic and typeless for the most part, and are very good at manipulating test with REGEXP.
PERL/python/ruby are probably better and faster for text processing than TCL.. but the...
Haven't used these a whole lot... but does anyone else find them a little confusing? i.e the 'naming' of the constraints don't always seem straight forward.
I guess once you understand them it's Ok, but initially they don't always seem intuitive..
Any good references for SDC? i.e a tutorial...
Pretty sure we can only use '$display' inside always/initial/task/function, etc...
You can use 'report' in other places, like procedures, functions, etc.
Where else would you want to use $display or 'report'?
I don't quite get the big deal with DDR... meaning is there a big savings by having the clock run at the data rate as opposed to 2x?
Say the data is toggling at 50 Mhz, DDR would use a 50 Mhz clock, but a single data rate would use 100 Mhz clock. No big deal.
But say the data rate is high...
Board to Board bus
Hi,
Need to run a bus from one VPX card to another (dumping data from one FPGA to another). Nominally, it's 16 bits @ 125 Mhz ( 2 Gb/s) .
Trying to determine if we can do this (easily) in parallel with single ended signals on say a ribbon cable? Or is it too...
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