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Recent content by gkj

  1. G

    huffman compression method

    i have the following coding but while running this program i got xxxxx as output. i need the matrix calculation for huffman compression method in theoretical also. module nhj(CLK, RST, rdy_in, rl_in, dc_in,scan_type, huffman_out); output [15:0] huffman_out; input...
  2. G

    huffman compression method

    Plz help me to write vhdl program for huffman compression method to compress 16bit
  3. G

    memory fault coding in modelsim

    Thank you, i vil check it out
  4. G

    memory fault coding in modelsim

    While running this program in modelsim its showing error that "std_logic and std_logic_vector" is an unknown identifier. plz help me to run this program library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following library...
  5. G

    i dono how to take the output for this phase frequency dectector

    ya this program is downloadedd in google search
  6. G

    i dono how to take the output for this phase frequency dectector

    module pfd (qinc, qdec, active, ref, reset); output qinc, qdec; input reset, active, ref; wire fv_rst, fr_rst; reg q0, q1; assign fr_rst = reset | (q0 & q1); assign fv_rst = reset | (q0 & q1); always @(posedge active or posedge fv_rst) begin if (fv_rst) q0 <=...
  7. G

    near module syntax error in model sim using d ff

    ya sir but i also do that in xilinx iam getting no errors im doing project on digital pll in 3-10 ghz range .so im using dff as my phase frequency dectector .one input is clk and other input is dco clk .i dono how to take the output.please help me sir. - - - Updated - - - sorry sir i saved...
  8. G

    near module syntax error in model sim using d ff

    module dff(q, q1,d,d1,clk,reset); output q,q1; input d,d1,clk,reset; reg q,q1; always@(posedge reset or negedge clk ) begin if(reset) begin q=1'b0; q1=1'b0; end else begin q=d; q1=d1; end end endmodule this is my code i getting syntax error in first line of in model sim please rectify that
  9. G

    all digital pll vhdl program

    i need all digital pll with 3 to 10 ghz frequency in vhdl program with spur reduction
  10. G

    all digital pll vhdl program

    can anyone send me the all digital pll output with simulation result
  11. G

    digital pll simulation result

    what are the inputs should give for a digital pll in model sim.im using 3 -10 ghz frequency

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