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yes, you'r right. as for increasing length of MOS, you can connect the transistors in series.
in fact, put these transistors on a same active region to share the source/drain to save the area.
Re: How to design the OPAMP used in 1-bit sigma-delta modula
for linear transient, increase the input transconductance and the output current of opamp to increase SR.
if slewing is inevitable, a conservative method, design the opamp with enough bandwidth to settle within the overall ADC...
hi
in general, the noise current contribution from cascode MOS is negligible, but why? i have read Razavi's book but i don't understand yet. somebody can give me an explanation?
thanks!
hi all
how can i design a multi-channel sigma-delta adc only using a sigma-delta modulator core? anyone can provide some advice or related documents? thanks!
noise simulation spectre
my method is to input differential noise source(using vdc(ac=1) and vcvs), use noise analysis to simulate. output noise selects voltage, and input noise is port. after simulation, use results in ADE to check input-referred or output-referred noise, or calculate noise...
maybe you can use Eric Vittoz's circuit, the MOS is biased in weak inversion region and the resistance can be adjusted by current of bias circuit. his paper is CMOS Analog Integrated Circuits Based on Weak Inversion Operation.
Re: Common source with Ideal current source load-short chann
the gain is a function of output voltage A(vout), and when output voltage change, the output resistance change, so the output resistance influences the gain. in design, we set the output transistors' length be long in order to reduce...
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