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Yes I did, but the board did not responde to my inputs.
There are two .bit files. One is system.bit and the other is download.bit. I tried the download.bit.
Hello,
I am trying to implement a system that saves the FPGA configuration data to 2 FLAsh PROMs (xcf04s) connected in Master Serial Mode to the FPGA (Spartan 3E 1200).
What I have done so far
1. I have designed a simple test VHDL entity, verified its working.
2. I have configured the...
Hello everyone,
I just tried to design a multiplier with 8 bits input and 17 bits output using vhdl. I intend to use the add shift method.
These are the step taken
1. 4 bit carry look ahead adder (cla)
2. with 4 bit cla made eight bits cla
3. 4 bits counter that resets at 8 ie 1000
4 17 bits...
Hello, I would like to learn how to write a testbench for a FSM.
Please can you help me write a suitable test bench for the code below. (Please I developed this code to be as simple as it can. However the knowledge gotten from learning it would be applied to a more bigger situation/code)...
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