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Recent content by gentle_man

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    about digital AGC - rquest for resources

    about digital AGC Who can kindly supply some materials about digital AGC used in wireless communication? Thanks
  2. G

    RF tranceiver calibration

    hi,akedar, Thanks for your reply. I need some paper about algorithm used in baseband to compensate the RF tranceiver , like IQ gain mismatch, IQ phase mismatch ,etc .
  3. G

    conformal lec check of multiplier

    multiplier conformal-lec hi,raju3295, thanks for your reply. Actually I tried these command before and it does not help much.
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    conformal lec check of multiplier

    lec vpx Dear all, In my design RTL there are datapth elements which likes c=a*b. When the data width becomes wiser it takes expotional time longer. Who has experience how to use derective in both DC synthesis and lec to make this progroess faster, please help. Also what document...
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    Verilog code doubts about using posedge pulse and posedge clk

    verilog code doubts Method A is async design while Method B is a sync design. Most tools support sync design better now
  6. G

    FFT books that are theory oriented

    Re: FFT you can find at www.ele.uri.edu/~hansenj/projects/ele436/fft.pdf
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    how do you think wimax, does it have bright future?

    who works in this field? thanks
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    RF tranceiver calibration

    Hi, Does anybody know something about RF transceiver calibation algorithm? Any infoemation is welcome. Thanks
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    where to download e-books in edaboard?

    you can use keyword search
  10. G

    Blogspot for ASIC verification

    I cannot access your page :(
  11. G

    about describe combinational logic in alway block

    to use blocking and non-blocking assignment in always construct to describe a combinatioanl logic, the following 2 methods do work, but which is the better, and why for example, adder always(...) out <= in1 + in2; always(...) out = in1 + in2; thanks
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    Metastability when the reset removal time of D-FF is violated

    dear all, I have a doubt about the removal time of D-FF. In a scenario when a D-FF with async reset removal, the reset width matchs but the reset remove time violated, if the D input remains 0, will Metastability occur? who can explain this in detail? thanks
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    what is the differece between physical compiler and dc?

    is the llibrary used by DC and PC same?
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    Priority of ahbmaster for AMBA arbiter ?

    Help for amba arbiter which IP core you used as arbitrator ? you'd better simulate this condtion ii think
  15. G

    Advice about edge-detection circuit

    edge-detection pay attention to the clock uesed to detect edge is sync with the signal or not.
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