Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I've edited the full waveform diagram into my original post. I'm considering what I can do in reference to your last paragraph.
- The Buffer4 components do indeed create tri-states. I've included a picture
- I'm not the one to ask about Xilinx in general, but my understanding is that they no...
You can see in the picture below the design our professor is having us implement. All the components simulate correctly and the design works perfectly on an FPGA board. But the testbench for the overall system is giving me tons of grief.
I'm getting this warning: Xst:2040 - Unit...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
