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analog digital 4 layer pcb
4layer is not difficult to route, only two standard types.
1, Signal, VCC, GND, Signal
2, Signal, GND, VCC, Signal
But if you have any BGAs, I think you must use second layout to route signals.
Your meaning is divide design, then load it back. That is not a real concurrent design concept.
Has someone tried Mentor team pcb function? I think that is a real concurrent design idea. Maybe other pcb vendors are thinking their way to have alike function.
Currently, I have heard that Mentor and Zuken both support this function, but it seems that mentor is better than zuken.
is there anybody here has experience on zuken concurrent design?
Can you give me more information about that, thanks.
You can check final gerber data with cam tools, also you are possible to use campare function in EDA tool if it is ready in your EDA tool(this function is available in CR5000 tool), otherwise please check your design eco.
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