Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Please specify the MCU.
I read three outcomes here:
1. Does not work.
2. Work with an opposite result.
3. and kinda works.
Is the 3 related to the 2 or they're separate states?
Hi
I'm looking for a motor with a worm gear for a monitor leveling application. I thought that a power window motor would be a good choice for it.
I tried to drive a **broken link removed** with different drivers (including a 50A one) in both direction. I encounter the same problem with all of...
As far as I remember the message means exactly what it's saying. The simulation works correctly, however the Proteus stopwatch is not synchronized with your windows clock while you are running the simulation (run at different speed), due to high processing load. So, it should not affect results...
I do not understand why Altium Designer is marked here as a complex package. I did my first design in Altium using the simplest tools. I was quite fast to progress with the PCB layout. Another story if you intend only to use these simple features in future and pay big bucks for Altium. Then...
The sequence of my thoughts was as following;
- I am implementing decoupling caps on the other side of the boards;
- I need larger inter-plane capacitence;
- but I have a bead which separate the CPLD power plane from a large main power plane, therefore the inter-plane capacitance is smaller for...
Thank you, marce and Ice-Tea.
I should pay more attention to the inter-plane capacitance.
I implemented this approach in a previous revision of the design, but I was not sure because some of the Tech Notes treat this approach as bad practice.
The factor of the inter-plane capacitance now puts...
The more I read the more I realize that my complex mixed-signal design with a sensitive Analog Front-End will be hurt by split grounds.
However, I would like to confirm it here If it worth it or not to split the grounds.
This is my internal ground plane on my 4-layer board. I will pour the...
I want to bring up this topic again.
I am working on 4 layer PCB right now and getting to decoupling of TQFP microcontroller and TQFP CPLD.
Everybody agrees that placing a decoupling cap on the same layer as a power pin and placing vias on the opposite side of the pads of the cap (not between...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
