Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi guys,
I'm new here and trying to look for some info about this comparator. Any references would be helpful of some tips about the circuit operation. Which is each clock phase intended for?
I also would like to know the minimum signal that this comparator can resolve (or why it's limited)...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.