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verilog pullup pulldown
ahhh, ok its versiondependent, that might be :-)
I tried it a few minutes ago with 2000.5 on NT and it works *jipieh*
ok, i think the variable is something like "enable_unti ....."
thanks for the good ideas
pulldown verilog
sorry, but i cant believe this :-)
the 2000.5 solaris release of my collegue CAN handle this ( I know, that the sold tells, that this cannot be used )
But i got the modules written before from him and it works.
He instantiated the above modules and replaced the "pullup (one)"...
verilog pullup
Hi ho,
I have ap roblem with a entlist and DC 2001.8 under linux.
In the netlist, there are a few verilog statements with the keywords pullup and pulldown ( i,e, pullup (zero) ).
So, my DC cannot read in this. "pullup not supported by synthesis" or "error at or near token...
Re: synopsys win nt problems
hiho,
AFAIR, this was a problem caused by the LSI License string. So, generate a new license without the LSI Feature or remove the Licensestring in the file.
for further instruction use the search , I think there were one or two threads about this topic
hope...
use any Modelsim Version you have.
to simulate the Gate-level (i.e. after Place and Route )
write out a verilog netlist.
Then compile the used xilinx-Technology in a library of your choice.
Load the design with this Library and then you can simulate it
mhhh, dont know how this works with Cadence Tools.
But for MS-Simulation, you could use the Avanti-Tools ( dont know the exact name ).
There you can make a complete digital Simulation according with analog Part.
Hope this is what you meant
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