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Recent content by fresh_easy

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    ADC and Memory design

    Here it is. Sorry once again.
  2. F

    ADC and Memory design

    Yeah I guess your right about the sampling. I'm really not to strong on DSP. The thing that I'm having a problem with is the number of samples now. Using Nyquists theorm alittle more than two samples should be ok to reconstruct the signal in question on screen through software. We are thinking...
  3. F

    ADC and Memory design

    Cool, thanks I'll check it out. The site seems pretty cool.
  4. F

    ADC and Memory design

    Thanks, I've never heard of FIFO before but sounds pretty cool. Read and write at the same time!!!!!! Simply amazing thanks again.
  5. F

    ADC and Memory design

    Hello guys, For my school project we are building a PC digital oscilloscope with a bandwidth of 10mhz and I need help with the design. I want to sample a signal injected into a ADC and store the value in RAM. The thing is I don't want to lose any samples and you can't read and write to Ram...
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