Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Thank you ads-ee for answer. With my EPCS device i can boot both the FPGA configuration and Nios II software. I'm using the Quartus 15.0.When i add the EPCS controller, the DATA, DCLK, ASDI, and nCS signals are not exported to Nios entity. This is why in device and pin options, I configured...
Hi again,
Just to inform you that i have always the same problem.
The behavior doesn't change even if use the alt_write_flash / alt_read_flash functions or alt_epcq_controller_write_block/alt_read_flash functions.
The routine that writes when using alt_write_flash is :
/* write to flash 32...
I want just to precise that in debug mode, I can see that the location
where I write changed but with wrong values.
For example, I'm writing 0x40228f5c to 04FC0000 address, but I can see
this :
04FC0000 2E479120 FFFFFFFF FFFFFFFF FFFFFFFF
I don't find an explication why.
Thanks in advance
Hi all,
I am building a custom system, using an FPGA board with a Nios II processor. I'm using Quartus 15.0 and DE0 NanoBoard( Cyclone IV as FPGA)
My application contains:
1. Clock Source
2. Nios II Processor
3. System ID
4. JTAG UART
5. EPCS Serial Flash Controller
6. PIO
7. SDRAM Controller...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.