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in general they should change polarity together because they receive the same sign change command. however they could be asynchronous of a few seconds in the polarity change.
Good morning,
I should make a parallel of two +/- 30Vdc bipolar power supplies for the lighting of LEDs that indicate the polarity of the source.
The figure shows the basic scheme in the two working modes with positive and negative polarity.
However, I need an external circuit that can...
Hi,
i designed a sinusoidal pwm amplifier (3KHz to 20KHz) that regulates its output voltage reading the RMS value of output current.
The RMS is obtained squaring the signal sampled by AD converter @200KHz and then applyng a FIR filter with 120 TAPS.
The advantage of this method is that the...
laplace from frequency dependant expression
Hi, i have this expression representing a frequency dependant power loss:
a=0.6265
b=2.24
c=1.41
Bpk=0.3 Kgauss
f=frequency
Ploss=a*Bpk^b*f^c
is it possible to obtain a laplace transform of Ploss (transfer function of s)?
Let me know
Hi,
on my board there is a pic uController and a ep4ce6 fpga (with epcs4 flash attached).
They communicate with spi interface.
The uC is the master and fpga is the slave.
When i want to change something in vhdl design i change epcs4 image through uC SPI interface because pins used...
Re: driving motor and simulation
No, this in not my question. I've to do a DC/AC converter.
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what is "mfr's web site"?
i've to design also a dc/dc as shown in the figure.
Hi,
I work as inverter and dc / dc designer, but I'm new in three-phase motors' subject.
I should make a project sketched in the figure.
the characteristics of the motors are in the picture.
I say the pilot will be in open loop.
how are the discrete components (MOS or igbt) dimensioned in...
The rms current in RLOAD should be constant(for example 20mArms) for a input signal variable from 50 to 150Vrms and from 50hz to 20khz. The current flowing in RLOAD is mesaured by other board in order to detect the presence of the input. If that board is programmed for a 20mArms and that current...
hi,
i have to mantain a constant sinusoidal current in RLOAD with simple circuit in figure below
but the current in RLOAD isn't sinusoidal because of the circuit itself.
How could i mantain a constant sinusoidal current in RLOAD? Which kind of circuit is more suitable for this...
Hi,
i'm testing an inverter with these features:
Fswitching=220KHz
Fout=3KHz-10Khz
Vout=150Vac
Pout=150W
Current feedback.
Sinusoidal output is obtained with transformer leakage inductor+output capacitor.
In the figure below there is the schematic.
The problem is that a little DC component...
Hi,
i'm designing a class d amplifier with current feedback as in figure below:
with the following features:
Vbus=50V
Iout programmable from 100mA to 1Arms
Vout=35Vrms max
When the load overcomes the programmed current (i.e. 1Arms) the amplifier saturates and the sinusoidal output becomes a...
Two fpga have different 50MHz clock source. The sync signal comes from an external cpu and it has 100ms period and 20ns pulse width but i can speed up the period.
So a slow drift could be happen.
I'd like to use ALTERA NCO where the input are:
MASTER CLK (50MHZ)
CLK ENABLE (25KHZ)
PHASE...
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