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Recent content by fnx7

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    spur!!!amplifier when input 192MHz bandwidth QAM256 signal.

    Re: spur!!!amplifier when input 192MHz bandwidth QAM256 sign Thanks biff44 The spur 2 and 3 is coming from clock, which is 512MHz. Those spur form 40MHz to 120MHz may be produced by 2 order nonlinearity. But the output power is far away less than P1dB of ACA2407. The P1dB may be 24dBm. When...
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    spur!!!amplifier when input 192MHz bandwidth QAM256 signal.

    When input 192MHz bandwidth QAM256 signal, there is some spur frmo 40MHz to 120MHz. The input signal frequency is 189~381MHz,32channel, power level is -39dBm per channel. The amplifier is ACA2407. Why? Thanks!
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    Which part of variable gain amplifier can be used ?

    Re: 50~860MHz VGA?? Thanks Mazz
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    Which part of variable gain amplifier can be used ?

    50~860MHz VGA?? Which part of variable gain amplifier can be used in this field? spec: frequency band: 50~860MHz impedance: 75 Ohm OIP3: 38dBm gain maximum:at least 15dB gain adjust range: 20dB Thanks
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    Effect of regulator noise

    Thanks But the circuit need 300mA at least.
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    Effect of regulator noise

    regulator noise How to estimate the effect of regulator noise? For example a CATV outdoor amplifier. The signal is 256QAM, the amplifier part is hybrid amplifier module, the regulator in the amplifier is LM7824. LM7824 noise 100Hz to 100KHz is 10uV/Vo. Whether the regulator LM7824 is good...
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    PLL problem - troubleshooting pll problems

    Re: PLL problem?? Thanks I changed the frequency setting in simulation, and get a new loop filter values. When the loop bandwidth is increased a bit, the loop is stable.
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    PLL problem - troubleshooting pll problems

    Re: PLL problem?? When lock at 1150~1650MHz it is ok. From 1750~2050MHz it seems unstable.
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    PLL problem - troubleshooting pll problems

    Re: PLL problem?? I calculated the loop filter values using Analog Device PLLsim3.0 loop bandwidth is 800Hz, phase margin is 43 degree. Perhaps the phase margin simulation is not same as measurement.
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    PLL problem - troubleshooting pll problems

    Re: PLL problem?? How to understand the inappropriate loop+gain? Could you explain it more detail Thanks
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    PLL problem - troubleshooting pll problems

    troubleshooting pll problems Test condition PLL chip :adf4106 VCO :950MHz~2150MHz charge pump current:2.5mA loop bandwidth: 800Hz PHD frequency(reference frequency):3MHz loop type type A test result I want to konw the probably cause. Thanks
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    PLL active loop filter

    designing pll with active loop filter Thanks. Could you tell me the advantage and disadvantage of that type and this type? Please see the image next.
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    PLL active loop filter

    active loop filter I wonder how to build a active loop filter in pll circuit. the CP pin of PLL chip connecte with "+" of OP. Why?? Added after 5 hours 18 minutes: please see the image
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    Why add 4 resistors on a inductor on CATV outdoor AMP

    The image is from internet. So I don't get high quality image. The function of the inductor is get 60V 60Hz AC current from coaxial cable, the signal frequency is 5~860MHz. In the schematic, it is a broadband(5~860MHz)chock Thanks.

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