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Recent content by flypeyton

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    PADS Layout - Same Net Clearance does not work

    I want to separate some power ground traces from the ground plane when doing pouring. In the design rule, I selected "net" and chose the "gnd" net and set the same net clearance of "trace" to 0.2mm. But when doing pouring, the ground traces are still covered by the ground plane. In Allegro or...
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    Cannot apply PCB decal to a symbol in PADs Decal Brower

    Hi Barry, Thanks for the answer. So how did you do it? Just input the Decal name to PKG_TYPE property's blank space? So the method is similar to Allegro's. In the layout tool, just prepare the decals in the right folder path. Correct? I'm almost scared away by your mentioning of "heterogeneous...
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    Cannot apply PCB decal to a symbol in PADs Decal Brower

    I am quite new to Mentor tools. I chose DxDesigner to create the schematic instead of PADs Logic. But it seems the procedure to create a part in DxDesigner's flow. In the Symbol Editor, I called up PADS Decal Brower, chose one decal, and clicked "Apply to Symbol". But it seemed nothing happened...
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    Cannot apply PCB decal to a symbol in PADs Decal Brower

    Hi, I am quite new to Mentor tools. I chose DxDesigner to create the schematic instead of PADs Logic. But it seems the procedure to create a part in DxDesigner's flow. In the Symbol Editor, I called up PADS Decal Brower, chose one decal, and clicked "Apply to Symbol". But it seemed nothing...
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    OrCAD Capture hangs there when generating netlist!

    Thank you for the reply! What do you mean by "designator"? The part value, the net alias, or the off-page connector names? Or all of them?
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    OrCAD Capture hangs there when generating netlist!

    I have created a middle size schematic. The DRC check has no errors. But Capture hangs there forever in the "netlisting the design" step with no error logs.
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    HFSS Cursor Problem - I can see only the regular cursor

    Found the solution. The problem lies in the display. Changing the color display to 16bit corrects the problem.
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    How to set up the ground for the lump port in HFSS?

    Thank you for the answer. I already tried it out. And I found the L & Q are quite sensitive to the ground size and position.
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    Result Mismatch - HFSS & SONNET & Momentum (Spiral I

    method of moments Wave port? How will you draw the integration line? I still doubt where the ground/PerfE sheet should be placed? In real case such like flip-chip applications, the ground sheet is not at the silicon substrate's side. The PCB ground is at the other side of the component.
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    How to set up the ground for the lump port in HFSS?

    how to set up lumped port I am simulating a spiral inductor on multilayer substrate. Lumped port (It is also called gap source port) are used. An airbox is enclosing the component. So how should I specify the ground for the lump port to connect to? I used Perfect E boundary condition for the...

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