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Recent content by fly6987

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    Berkeley EECS140,240,247 Classes

    thanks for sharing all the information!!
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    Where can I download AMS 0.35 design kit for cadence?

    any one can help me, please! mail: gerardly80@yahoo.com
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    Where can I download AMS 0.35 design kit for cadence?

    plz help i need ams 0.35 design kit for cadence
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    Where can download TSMC design kit for ADS ? Thx

    tsmc opto hi dear, any one has AMS 0.35 OPTO design kit for cadence? plz help thanks a lot!!!
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    Successive approximation register

    verilog successive approximation adc For me, the best solution for the logic part is to do it by yourself (not in vhdl). Because the most difficult thing will happen when you begin to draw the layout of the circuit. The better solution is to use charge redistribution concept which allows to...
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    How to test or simulate the jitter of LVDS TX ?

    Re: LVDS design I need also some papers on LVDS design, could you do me a favor? My e-mail address is gerardly80@yahoo.com
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    what are the different view used for?

    calibre view is used for post layout simulation. u can find more answers in cadence's CDSdoc
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    I would like to build a 6 bit flash ADC using comparator

    Flash ADC design... The book "CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters by Rudy J. van de Plassche" is very good! You can find all the answers in it!
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    fringe capacitance calculation

    fringing cap but larger unit area increases also unit perimeter!!! moreover, larger unit area increases the total area of your circiut!!! for me, the better solution is to use metal of different layer to route the circuit.
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    I need cmos 0.35um library file for use in hspice software.

    Re: help for cmos parameters which foundry do u want?
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    TSMC 0.18 RF designkit for ADS2005A

    @DS2003 design kit Thanks for sharing. I'll try to install it.
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    burried layer and epitaxial layer

    epi layer is most asked for optical applications to avoid cross talk phenomena.

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