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Hi,
What is the best way to reduce the voltage drop of a MOSFET current mirror for both nMOS and pMOS? Would it be the same for a cascode current mirror or wide-swing current mirror?
thanks
Hey @erikl
It's really clear to me now. I'm assuming the mismatch variation parameters are "Avt and Ab"? for threshold and current factor. I am using LTSpice. From what I've seen, mismatch can be analyzed using LTSpice. How would I go about doing this?
Thanks!
Hey @erikl
Thanks for the model file, that makes it really clear.
I've got one question. I've read that there are many ways to analyze process variation, corner analysis, interval analysis, monte carlo, etc.
Since corner analysis invokes the 'worst corners', does this mean its the most...
Hey @dick_freebird,
thanks for the answer, that really helped.
I've got a question about each model (UP, DOWN, FAST, and SLOW) I've been simulating each of them (eg. replacing all typical models with fast models, etc...) to see whether the circuit is still 'acceptable'. UP model seems to have...
Hi,
I've been simulating a 2-stage op-amp using MOSFETs. These MOSFET models come with (typical, fast, slow, up and down).
I've only done simulations using typical models and am not sure how the rest of the MOSFET variation works.
Do I simply replace all the typical values (the op-amp works...
Hi guys,
I need to offset an analogue signal up by 1v and then down by 0.5v, would this be possible using level shifter? If so could someone give me some recommendations?
thanks!
Hi,
I have a buffer amplifier where the input/output can reach 0-10v with a single supply ground to rail 10v
I have an analogue input signal that varies between 0-10.5v
Is there a way for when the input voltage goes above 10v that the output could scale down to exactly 10v without any...
hey guys,
what are some advantages and disadvantages of drain extended mosfet over standard low voltage mosfets? assuming I am using these for a common drain amplifier for both high and low voltages?
does drain extended mosfet have body effect?
thanks!
Hey guys,
just as the title says, is there a way to increase the output voltage range of a mosfet 2 stage op-amp without changing any of the components but rather add components?
Assuming the op-amp can handle max input of 1.8v and has a supply of single rail 1.8v and needs to increase to 8v...
Hi,
I have a question about LTSpice, i'm still unfamiliar with what it can and cannot do.
Can LTSpice show errors for when something is exceeded? For example, a MOSFET drain to source voltage is being exceeded way too high? Or this must be known to the user beforehand?
thanks!
hi guys,
I'm looking at a specific data sheet at the moment
https://www.vishay.com/docs/71166/71166.pdf
at the top of the data sheet it shows "N-Channel 1.8V (G-S) MOSFET"
what exactly does the 1.8v (G-S) imply? and why is it important?
- Sorry if the question is silly!
thanks.
Hey esp1,
Heres the asc file. I'll have to do some readings on what you've mentioned as I have not considered all of that.
I'm just wondering if its possible to increase the output swing of the buffer to 0-10v (assuming the circuit I have now is unable to go that high) as efficient as possible...
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