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Because I also need to run gate level simulations. I have used Modelsim signal spy to view internal signals for testing. You can find the same signal in the netlist so can still do this but I would rather avoid it.
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I need to do post layout simulations so not sure...
Has anyone come up with a good way of describing a state machine in requirements without access to the state signals, e.g. so it is directly testable?
For instance
1) The state machine shall change state from state A to state B when Z = 1.
2) When in state B, output C shall be set to 1
When...
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