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I have OTA schematic with nmos sizing is 50um/10um(w/l) and pmos sizing is 10um/10um(w/l) .this schematic is implemented in 0.35um technology. i have to implement the same schematic in 90 nm . i want to know how calculate w/l ratio for 90nm technology.
Thanks for your reply. This is the paper in which self biased current source is mentioned. Please have a look at this andkindly help me ... i need this to work out in final project. i'm working in 90nm technology with supply voltage =1V. Ibias is used to implement OTA filter for biomedical...
Thanks for your reply.
Would you please tell me about the sizing of transistors as well as their region of operation (weak inversion and moderate inversion)in designing current mirror circuit so as to get Ibias=200pA or 1nA.
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