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how to calculate the value of resistances which are going to used for a particular design of Instrumentation amplifier .........i have made two stage CMOS Op amp and now i want to make instrumentation amplifer but problem is how to take the values of resistances to make all the MOS working in...
can any one plz tell me how to determine the value of resistances that are used in 3 Op - Amp Instrumentation amplifer as every book said that gain of instrumentation amplifier can be varied by varying resistors but i dont know how to start means what value i can take for my instrumentation how...
I am unable to get the curves which shows in gm/Id mehtodology in Tanner i had searched in google for such curves but i got the procedure only for Cadence ..............so i just ask how to get the curves which are used in gm/id method
Hi Nitish,
Can you plz send me the procedure to calculate W/L ration of MOS for Two stage MOS Op amp using gm/Id method using Tanner EDA...............i had searched alot but fing only in cadence not in Tanner but i dont have cadence so plz help
Sir i dont know how to apply baising for Differential MOS pairs.....how to connect Inputs and ...and how to calculate vaules of resistances................my Vdd is 1.8 v and two stage open loop gain is 69 db
i am using TSMC 180nm process
I want to made instrumentation amplifier from 3 Two stage MOS Op amp which i have designes in Tanner EDA on 0.18 um TSMC process ..........i am connectin Op amps as shown in books through resistors but i dont know what of resistors is working on my designed circuit and how to apply Vcm and...
I am tryng to design the Analog Amplifier in Tanner EDA the probem is that the base paper is on .18um BSIM3v3 as i know because of .18 um technology the MOS Channel length should be .18um but in base paper the author writes a line for the sake of simplicity he takes 1 um MOS channel length and i...
ok...Thank you very much for your reply.............can you tell me that I am using PTM 180 nm model, is their any difference in designing parameters while designing Analog amplifier as UMC 180 nm process such as Vth, Un, Cox etc
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