Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
cmos process parameters 0.18um
Can anyone please tell me the following parameters for CMOS 0.18um process?
For nMOS and pMOS:
- KP (for beta=KP*W/L in uA/V^2)
- Vth
I am using TSMC 0.18um. I also looked for them in the documents provided by TSMC without any luck
Regards,
Faraday.
Could anyone please tell me how to measure timing jitter in an Oscillator in Cadence? For question, assume it's a 5 stage voltage controlled ring oscillator. Freq is 1Ghz.
Regards,
Faraday(who struggles in CMOS!)
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.