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Recent content by exp

  1. E

    Reasonable values of on-chip inductors in a typical 130nm process?

    What are reasonable values for on-chip (planar spiral) inductors in a typical 130nm process? I know that values larger than 100nH are not meaningful because the total length becomes so large that it cannot be considered a lumped element any more at frequencies of interest. I also have some vague...
  2. E

    Nonlinear capacitor in Cadence Virtuoso/spectre?

    It will, eventually. But right now I am working with behavioral models and first need to match the behavior of my circuit with hand calculations. So yes, right now I need a nonlinear cap where I can set the nonlinear C(V) curve precicely Yes, indeed it is a node name. This the net list: //...
  3. E

    Nonlinear capacitor in Cadence Virtuoso/spectre?

    I understand bsource and spectre ... it is working. I am talking about an ADE L issue
  4. E

    Nonlinear capacitor in Cadence Virtuoso/spectre?

    Thank you, got it working now. In the netlist it looks as you wrote (just with capacitor instead of bsource) ... in ADE L I instantiate a capacitor and write the expression C*(1+b1*v(vout,0)) for capacitor value. However, when I start simulation in ADE L it treats "vout" as variable that is...
  5. E

    Nonlinear capacitor in Cadence Virtuoso/spectre?

    Hi, Fairly trivial question: What is the proper way to model a nonlinear capacitor in Virtuoso? In LTSpice, I can just use an expression like this: Q=1e-6*x+a*1e-6*0.5*tanh(2*x) In Cadence, I tried the following: C1 (vout 0) capacitor c=1e-6*(1+0.5*v(vout,0)) However, first I would need...
  6. E

    Good lecture notes or resources for display technology (circuit design)

    Does anybody know good lecture notes (available) online on the intro of display technology with circuit design emphasis? Maybe I am searching for the wrong terms but I can't find something really nice. For example, if I would ask this question for SerDes I would point to...
  7. E

    25% vs 50% Duty Cycle, passive I/Q Downconversion mixer

    Hi, Until yesterday I would have bet everything that a passive mixer, driven by 25% duty cycle gets rid of the 3rd, 7th, 9th etc harmonic; while the 50% version has all odd-order harmonics. I swear I have read this in about every single paper in that area so that I started assuming it "granted...
  8. E

    Simple Diff Pair Nonlinearity

    Hi, This is the first time I hear the term input and output nonlinearity (I have taken many advanced circuits and RF courses which all covered nonlinearity). Can you elaborate what you mean by that? IIP vs OIP? Assuming an amplifier, I input an input signal, the amplifier distorts it (due to...
  9. E

    Simple Diff Pair Nonlinearity

    I have a simple MOS diff pair with MOS loads and self biased output common mode in a 28nm process. For example: input pair NMOS, loads: PMOS (gates connected to drain via high resistance for setting the common mode). Linearity is important for my application. However, all linearity analysis and...
  10. E

    Typical differential input impedance for IC

    The typical impedance used in RF is 50 Ohm and if I build an RFIC with a "RFIN" pin I can expect its source impedance to be 50 Ohm. However, how does the situation look like in a differential setup, when I have, say RFIN+ and RFIN-? 50 Ohm Single Ended would be 25 Ohm differential. Does that...
  11. E

    Buffer stage: CD vs CS

    Hi, I need to add a buffer stage to my OTA design to make it an op amp. My design will be in 28nm VDDnom=1V (but I increase to 1.2V). Until now, when I heard buffer I always thought about CD but I realized that a CS stage with unity gain can also be a buffer. Can someone give the...
  12. E

    Nonlinear resistor: behavioral model (multi-dim Taylor series)

    Hi, Does spectre/Cadence support something like an ideal current or voltage multiplier block or anything I could simulate this nonlinear behavior? I would like to build a behavioral model of the following equation: i = g1*Vp + g2p*Vp^2 + g3p*Vp^3 - g1*Vm + g2m*Vm^2 + g3m*Vm^3 + g2vm * Vp * Vm...
  13. E

    [SOLVED] calculation of input and output impedance using feedback technique

    Have you looked at Blackman's impedance formula already? Otherwise just connect a test current source where A1 is and measure the voltage at the gate?
  14. E

    Nonlinearity in fully differential circuit

    Hi, Consider the following two circuits, being an integrator with identical component values (R, C, OpAmp impedances, gain, ...) in its single-ended and fully differential version (the amplifier is a behavioral model basically just a VCVS): Ignoring the nonlinear resistance in the circuit...
  15. E

    Using VCO instead of PLL (Drift of a VCO)

    Ok, thank you. To summarize: An LC-oscillator based LCO has no frequency stability in practice due to temperature drift. Reason: As mentioned, the exact frequency does not matter in my application (I can "calibrate" the system at startup for whatever frequency the VCO will give me for a certain...
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