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HI,
I am working on a project about processor by using TSMC18 technology. This processor needs a SRAM memory. I know how to synthesi and P&R for a common digital design. But,
How can I deal with the memory? Any free memory compiler available?
hierarchy + soc encounter
Hello,
I have two modules: Module A and Module B. A contains B.
After I import designs, module B is placed in separated place.
How can I place module B as a block in specific area?
Thanks,
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