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Recent content by Esakki raja

  1. E

    How can we say effects are cancel each other in common centroid matching

    Hi Generally we go for matching to reduce the effects like stress and thermal gradient but how can i decide that which matching is best and how the layout effects are cancel each other ?
  2. E

    How can i choose differential amplifier

    Thanks LvW Now i got it .Its very helpful to me Thanks a lot........
  3. E

    How can i choose differential amplifier

    Thanks Brad For example I need 40 dB gain for my amplifier design means Is there any relation to the current vs gain. Because if it has any relation then I choose the current from that relation to achieve my gain spec.
  4. E

    How can i choose differential amplifier

    Hi In differential amplifier we are using the current source how can i decide the current value for the amplifiers design.
  5. E

    How can I find process mismatch parameter Avt

    Hi I need Avt mismatch value to run the mante carlo analysis.Please help to find this.
  6. E

    Problem with Hierarchial DRC run in calibre

    Hi When I am running DRC with Hierarchical input option i have a problem when highlighting the drc errors. ERROR is it is not point the correct location of that errors.That means there is no metal or any layer is present in highlighting area.
  7. E

    doubt in Convertion of integer to sting in skill code

    Hi I have doubt in convertion of integer to string in skill code i.e var = 5 (here var--> value is 5) Here i want to set var-->value is "5" (string) by using the variable var How can i do this
  8. E

    gain mismatch from practial and theoritical

    I had taken the gm in the dc operating point results from simulation and r0 taken from (ro1||ro2) .Is there any effects are considered for the gm and r0 calculation and which book has detailed about that?
  9. E

    gain mismatch from practial and theoritical

    Hi i explain my doubt. that is if we are using the cs amplifier with current source load, the gain Av = -gm1(ro1||ro2) this formula used to find the gain in theoretical . But it is not same for the simulator value from the waveform in practical.
  10. E

    gain mismatch from practial and theoritical

    How to check the theoretical value and practical value for gain in cs stage ? theoretical value ----> As per our calculation from formula practical value ---->As per our simulation from the tools Is there any impact occur for these two values?
  11. E

    impedance of voltage and current buffer

    why we are choose high input impedance and low output impedance for voltage buffer and low input impedance and high output impedance for current buffer?
  12. E

    Stability measurement

    How to measure the stability for the op amps?
  13. E

    How to choose the width and length for the digital logic design?

    Re: Digital logic design i explain my question clearly .For example for the inverter design how to choose the pmos width and nmos width?is there any consideration like duty cycle and anything
  14. E

    Reset conditon for logic

    Why we are using the reset in the logic and how to fix the reset connection to the logic ?
  15. E

    How to choose the width and length for the digital logic design?

    How to choose the width and length for the digital logic? Are there rules that follow it?
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