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I am using VIAGND in schematic simulation. When I generate the layout from my schematic, the hole in VIAGND still visible
But, after converting to symbol, the hole disappear, left only the pad.
May I know if I have set the wrong layer? I have tried to connect the pin in the symbol but looks...
@FvM Oh I see.... thank you for enlightening me!
@vbirgun Yes, I have tried them before this. The current design is to ensure that my measurement was correct. (I combined all of the respective parts into one)
@volker@muehlhaus thanks for helping me... that's actually a via with rectangular pad...
Hi, currently i am designing a 2.45ghz energy harvesting system. The below part is my rectifier schematic.
The matching is tuned and the S-parameter hits below -10 dB, which is shown as below.
It seems good and the result from the schematic is what I desired to have.
The problem is when I...
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