Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by Enialis88

  1. E

    SAR ADC Parasitic capacitance of S/H

    The ON-resistance is nearly constant with the bootstrapped circuit. The problem is in the OFF-state not in the ON-state. Since the sampling switch is big, it has parasitic capacitance to ground that adds to the capacitor array. This parasitic capacitance creates an offset during the charge...
  2. E

    SAR ADC Parasitic capacitance of S/H

    Hello, I design a differential 10 bit SAR ADC and I have a problem with switches. I used a bootstrapped switch for the sampling optimizing it for charge injection. The problem arises when this switch is OFF: its parasitic capacitance creates offset during the switching of the SAR conversion...
  3. E

    D Flip-flop with preset in simulink

    Hello, I would like to know how to add a PRESET signal to the D Flip-Flop block in Simulink, that has only the CLEAR. The truth table should be: PRESET CLR Q !Q 0 0 1 1 0 1 1 0 1 0 0 1 1 1 Normal FF output Since no extra trigger/enable can...
  4. E

    [SOLVED] HFSS - ridge waveguide modes

    I solved the problem: the mesh on the two ports was different and so I had two different solutions.
  5. E

    [SOLVED] HFSS - ridge waveguide modes

    I would like to create the Gamma vs frequency graph of a ridge (circular) waveguide to see the cut-off frequencies of the first 5 modes. I don't know how to define the integration line, but from my first trials I obtain some results simulating ports-only. However the results of Gamma from the...

Part and Inventory Search

Back
Top