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Recent content by engronger

  1. E

    What is difference between ron and 1/gds?

    difference between gds and gdsii for me , i think, if the device is working in deep linear range, the Ron=1/gds, but if working in saturature range, you can not say that, you can see small signal model, the r0=1/gds
  2. E

    Hspice - how to define, probe expressions of waveforms?

    Re: Hspice question good thanks
  3. E

    How to setup and measure DNL and INL in Cadence Spectre?

    inl dnl calculations could you please share it ? thanks very much
  4. E

    Hspice - how to define, probe expressions of waveforms?

    Re: Hspice question i do not know how to realize, but i think the calculator in waveform display tools is a good choice. ps: how to realize it in eldo?
  5. E

    LDO voltage regulator transient analysis

    you want to know how to do transient analysis for a LDO i think, you can do like this: 1: give no current output to check the stability, you can see the when the system is power on, there is a dump oscillation or not. 2: give max output current to check the drive ability. see the output voltage...
  6. E

    when draw the dc/dc layout, which part is critical?

    since DC-DC need to drive big current, you should take care of the large current path seriously, guard ring and more devices interval are necessary
  7. E

    problem with LDO design!

    i am afraid, the pass element's W/L is too small, i can not believe W/L =6 can drive out 100mA's current, you'd better re-design it . by the way , i think you spec is easy realized, if you find your LDO is not stable, you'd better show what compensation you use, where is the domain pole. and...
  8. E

    How to design the dead point for bandgap circuit?

    Re: bandgap problem,also when simulation, the bandgap is not always die. why we need a startup circuit ,that is because there is a mismatch. the dead point, you must set the point which will make your circuit un-work
  9. E

    PMOS for ESD protection????

    i think it is for power supply noise consideration and ESD the MOS is connected to VCC, and the p-sub is connected to VSS. it just use the NWELL and the sub as a inversly PN-junction. so that when power noise or ESD charge voltage more than inversly PN-junction voltage, it can filter the high...
  10. E

    the question about the on chip charge pump for EEPROM

    i think you can use a charge pump that has a NMOS source follow output to small the output capacitor. you can find papers on IEEE, keyword charge pump, memory. i use linux now and do not have a paper. otherwise i can upload some papers for you
  11. E

    Generating the bias voltage of an op-amp

    Re: Bandgap Reference i think you can still use bandgap, the bandgap that base on current independent can get a voltage high than 1.2V by the way, LDO is not a good idea, LDO is designed to drive large current not here. Added after 1 minutes: you can do it as a AC sweep. the difference...
  12. E

    about usb1.1 PHY's buffer impedance

    usb1.1 impedance in USB1.1's specification, there is a request that the impedance of each of the drivers mst be between 28ohm and 44ohm my question is : when we design the PHY, how to simulate the driver impendance? DC sweep the output current and voltage or transcient simulation and then give...
  13. E

    Generating the bias voltage of an op-amp

    Re: Bandgap Reference you amp need a so accurate bias?, usually, what a amp really need is a bias current and some times a reference input voltage, if you need a bias current , you can use a bandgap, and then a current mirror is used to give the bias. if you need a reference input voltage...
  14. E

    About USB HOST 1.1 PHY

    q1: my understand is that it's just a IO cell , so it can be drawn in th PAD cell q2: the same as q1

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