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Recent content by eng.fedail

  1. E

    design mistake "sequential type is unconnected in block"

    I got rid of all the warning messages by re-configuring the instance structure. but still in RTL cout is not connected as expected attached is a snap updated code is ALU1: entity work.CC_1 port map(S(11),S(10),Cin,S(9 downto 8),A,B,oTemp1,ocTemp1); ALU2: entity work.CC_1 port...
  2. E

    design mistake "sequential type is unconnected in block"

    In my design I'm assigning an output of block to a FF before feed it back to next block. it's working ok with me with the data vector but with a single variable is not working, I have tried to implement it in different case and I do still have the same problem here is how I'm defining my...
  3. E

    Synthesize And gate instead of LUT

    The question and your answer for me make sens, Cause I understand now it's related to the device while I was thinking I can build up gates in FPGA thanks
  4. E

    Synthesize And gate instead of LUT

    Hello all, Down is part of my ode variable counter : Integer RANGE 0 to 7 := 0; if (counter = 7) then valid <= '1'; end if; After Synthesize the if condition the result is about LUT to output one at valid signal, I'd like to use and gate instead of that, any idea? I have tried to...
  5. E

    Simulate Altera Dsign

    that's true I'm just trying to find a way for simulating/ modeling the whole system. in a graphical view.
  6. E

    Simulate Altera Dsign

    OK thanks for both of u it's clear and obvious it's not a problem to use another software to test my code. the idea is I'm in need to simulate the whole system. an example you want to simulate an intersection traffic light by using a simulator like proteus but the problem by choosing altera as...
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    Simulate Altera Dsign

    yes I mean relays leds memory
  8. E

    Simulate Altera Dsign

    what I'm trying to ask for is to simulate the whole system I'm trying to build. I want to simulate exactly like prtoeus if its' possible thanks for ur answers.
  9. E

    Simulate Altera Dsign

    modelsim doesn't have a simulator like proteus.
  10. E

    Simulate Altera Dsign

    Hello, Do you have any idea about how can we simulate the design of altera component using quartus 2. If there is any application like proteus provide us the ability to simulate by using an electronics components. thanks in advance.
  11. E

    Proteus and VHDL compnenet

    is there anyway to use altera model in proteus? if it's not is there any way to simulate the system in other program?
  12. E

    Proteus and VHDL compnenet

    you mean by your answer there are no features to use any fpga model to simulate in proteus.
  13. E

    Proteus and VHDL compnenet

    Hello, Did anyone try before to simulate VHDL component in Proteus simulator? if yes which one. thanks.

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