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Recent content by elx

  1. E

    Split Attenuating Cap SAR ADC problem

    Hello I have this problem about my SAR ADC... I tried to simulate the SAR ADC by letting an input of 1.35 V at one terminal of the comparator (net vin). I unattach the sample and hold for now. I expect that at first cycle when SAR logic output (D7~D0) is 1000 0000, the dac output (net98)...
  2. E

    [SOLVED] Split Attenuation Cap DAC

    Hello! May I know why my dac output ranges from -1.8V to 0V instead of 0V to 1.8V. Thank you.
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