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Hi,
I'm trying to use the SLPS interface with OrCAD 16.0 and Matlab 7.0 or R2012a (or any Matlab version). My OS is Windows 7 (64 bit, but Matlab 7 should be 32 bit).
I created a very simple simulink mdl file with an SLPS block and I followed the slps user guide in ...\doc\slps\slpsug.pdf...
Velocity-saturated characteristics of short-channel MOSFETs (1984)
G W Taylor
AT&T Bell Labs Technological Journal vol. 63 no. 7
In my university they have vol. 63, but only 'til no. 6 :evil:
I assume kn = mun * Cox; if this is the case, the expression for the short channel saturation current is wrong, since it has not to be divided by 2L. (or it is not a current, dimensionally). Moreover, remember that it's just an approximation valid for L->0.
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If you don't have a design kit, then I'm sorry, but you'll have to copy by hand the parameters. Come on, it is mandatory to do that at least once in your lifetime! (it takes 5 minutes...)
pump circuit
Use of Schottky diodes is preferable in charge pump circuits because their threshold voltage [tex:178e22369f]V_{\gamma}[/tex:178e22369f] is sensibly lower. Consider that [tex:178e22369f]V_{\gamma}[/tex:178e22369f] affects the voltage pumping gain of the charge pump: the output...
Input impedance
First of all, thanks for your answer.
For Z0 you mean 50 ohms? In my circuit, anyway, I don't make use of transmission lines, it is just made of lumped components.
And what about S11? It is a two-terminal network, so I believe one should use S12 or S21 instead.
Input impedance
I have to measure the input impedance variation (with frequency) of a RFID tag (a simple circuit) from the antenna's terminals (call them in1 and in2). How should I do this in ADS? I tried with a termination between the inputs and with a HB simulation, but I get weird results...
charge pump circuit design
The Nmos and Pmos are the Pull-Down and the Pull-Up af a CMOS inverter. If the control signal is low, the pmos is on, and the DC/DC input power voltage is 3V. If the control signal is high the nmos is on and the DC/DC input power voltage is connected to ground through...
transistor saturation circuit
Suppose \[Q\] is in SAT. Then \[V_{BE}=V_{\gamma}\] and \[V_{CE}=V_{CE_{SAT}}\]. Now suppose the yellow ribbon is \[5V\]. Then
\[V_{CE_{SAT}}+R_1 i_C=5\]
and
\[V_{\gamma}+R_2 i_B=5\]
If \[Q\] is in SAT, then \[i_C< \beta_F i_B\], so...
site:www.edaboard.com voltage regulator
Hi to everybody.
Could you suggest me the architecture of a voltage regulator for ICs in BiCMOS (it means I can use MOS transistors and npn BJTs - not pnp) technology?
I guess it should be composed by a voltage/current reference and a LDO.
Furthermore...
bsim3 lambda
How do I get the value of \[\lambda\] ( the channel length modulation parameter for MOSFETs), starting from a BSIM3 model? And what about \[N_A\], \[N_D\] (acceptors and donors concentrations) and the \[\gamma\] coefficient for the body effect? Is there a web reference with all of...
Ok, thanks. The program gets angry when e.g. I assign the value "w" to the parameter w, and it comes out with a message: "Unrecognized variable or expression for parameter", even if I had defined w through the Design Parameters. Anyway, it works, since I created a (working) parametric circuit...
ads subnetwork
I'm designing an IC with MOS transistors in ADS. They have a bulk contact which must be connected to substrate to obtain realistic simulations. This is obtained by using a special element of the design kit called ptap (ntap for pMOS's). This way, every transistor needs a lot of...
A series of a certain number of diode-connected NMOS transistors is suitable for realizing large resistors. They should have very low \[\left(\frac{W}{L}\right) \], about \[0.24/30 \mu \mbox{m}\]. Furthermore, if you have access to LVT (Low Threshold) or better to ZVT (Zero Threshold) NMOS's you...
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