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Recent content by ee_cchac

  1. E

    Questions about LDO design

    Re: LDO question The idea is....ldo will usually receive a large current and off chip Cap(*with its esr*), which are all external source provided to LDO to operated. So, from using point of view, it seems there is no choice for LDO..... somethings external must connect with....
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    Question about LDO on chip?

    agree, most likely, there must a off chip cap @ PAD and yr LDO will connect with pad. Also, the loading current will large( in terms of mA).......it seems this may be a too large current flow in yr chip internally.... if a device is need to provide stable Vo to internal blocks, LDO ....i guess...
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    Problem on Load Regulation of LDO?

    mu......did u try just using a simple, ideal cap ? if u got the right result, at least prove the problem is from the cap u using. by the way, why don't u use smallest channel length ? i heard this is better for the Vo .... and, plz to upload yr schematic la.....to share with us
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    needs help on a LDO design problem

    mu.....i am fresh in LDO, but have some question would like to ask : 1>the uspply voltage is 1.2V....how about the reference voltage ? 2>the Vo is 1V, so thus the Power PMOS (PPMOS) size...will... By the way, how about adding a voltage buffer between AMP and PPMOS ? And is frequency...
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    ESR value for LDO and tempco

    Thanks for reply i now got another problem, i find that LDO tempco not follow bangap tempco. my bandgap tempco is done shape, but LDO is a line with a increasing slope.. it seems my circuit should correct in connetion. anyone know what's wrong ?
  6. E

    ESR value for LDO and tempco

    I am now working on LDO, seesm to be almost finish. But i got a problem. When i was working on my LDO design, the loading cap 's esr value is 1 ohm. Then, when i almost end, i heard that 1 ohm is too large, and 20m ohm is suitable. I was then super down, since it seesm to me i need to back to...
  7. E

    Loop stability question?

    Thanks brothers support !!! i often confuse with feedback loop in series or/and in parallel cases. The book Feedback amplifier principles, hope i can master this book and be familiar on feedback more
  8. E

    overshoot & undershoot of LDO's load transient response

    transient overshoot compensation i am HK ar, now having MSc ICDE @ hkust, doing FYP on LDO design.....haha anyway, add oil, keep in touch ~~ hope more experts will give us help and fresh idea ~~
  9. E

    overshoot & undershoot of LDO's load transient response

    transient undershoot overshoot topics : A Capacitor-Free CMOS Low-Dropout Regulator With Damping-Factor-Control Frequency Compensation More, paper about internal zero/pole: Pole-Zero Tracking Frequency Compensation For Low Dropout Regulator both paper from HKUST,u should able to find in...
  10. E

    Loop stability question?

    questions for above two replys why finding the common point and break it to analysis ??? why the BW will be the smaller on if series ? how about the case of in parallel ?
  11. E

    Need LDO expert's help

    Traditional LDO design, domainant pole 99.99999% result from output cap(Co). in real life design, this is a real capicator, therefore, it is not an ideal cap and will have resistance, it is know as Resr. Because of Resr, there is a zero. Co master the domainant pole, the zero will cancel the...
  12. E

    overshoot & undershoot of LDO's load transient response

    reduce undershoot 1> there is a paper about handling damping effect , u can have a look on it... but this is "super difficult" for me, since it need to design more extra circuits to "tackle" the damping effect...... 2> if there is no cap, how about the current pass through the Power pmos at...
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    Are there any uncommon sram structures?

    Re: sram structures helo, because of SRAM design ( 2 INVs plus two nmos for read write ), it seems to me that 5T or 7T is not that possible... However, i think u should know that there is 1 T SRAM (MOS + CAP). So, i think if the number is clsoe to six, the number of mos shoul be even. if u...
  14. E

    What is the Line and Load regulation in LDO design ?

    Re: LDO design Thz reply ~~ But...how about the measure....how do i measure the line and load regulation in LDO ?
  15. E

    What is the Line and Load regulation in LDO design ?

    What is Line and Load regulation ? why do we need to take care on it on circuit design ? For LDO design, How do we measure them ? I have read a paper on LDO design such that it is "stable on any Cap. value". is it possible to do so ? THANKS
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